This invention generally relates to plastic packages for integrated circuits. More particularly, it relates to improved structures for reducing warpage of the plastic package module and for providing a more planar module. Even more particularly, it relates to an improved lead frame that provides a more planar module.
Integrated circuit chips are most commonly electrically connected to the outside world through a highly conductive lead frame. Wire bond pads of a chip are connected to the thicker and sturdier lead frame conductors with delicate 1 mil diameter wires. The chip, the delicate wires and neighboring portions of the lead frame are encapsulated in molded plastic to protect the chip and the wires from damage, while portions of lead frame conductors that extend beyond the plastic are available for soldering to the next level of assembly, such as a printed circuit board. Millions of modules of this type are sold every year.
Various problems have been identified with this packaging concept, and one of these is warpage. High stresses that warp or bend the finished module can crack the integrated circuit chip and stop it from functioning properly. The bending and cracking can occur during the packaging process or later after the chip package has been mounted in an electronic device in use by a customer. The reductions in yield add substantially to the cost of the packaged chip, and fails that occur during use can annoy customers.
Even if the chip does not crack package bending can cause serious problems during the soldering process to attach lead frames of the module to a printed circuit board. If the plastic package module warps, positions of lead tips can move out of planarity, and some lead tips may not make contact to pads on the board during the soldering step. To avoid this problem, an industry planarity specification, MS-024, established by JEDEC, provides that all leads must be planar with no two leads deviating from each other by more than 4 mils.
Package bending arises if the package is made of different materials that have different thermal coefficients of expansion (TCE). Typically the silicon chip, the metal lead frame, and the plastic encapsulant have very different TCEs, and the package can experience substantial changes in temperature, either during manufacture or during use. Thus, a better solution for plastic packaging is needed that avoids temperature stresses that can cause warpage, and this solution is provided by the following invention.
It is therefore an object of the present invention to provide a way to reduce or eliminate warpage of plastic packages.
It is a further object of the present invention to provide a lead frame design that reduces warpage.
It is a further object of the present invention to provide a lead frame that balances forces so that bending is avoided when temperature changes.
It is a feature of the present invention that a lead frame has elements for electrically connecting to a chip on one level and extra elements for balancing stress on a second level within the plastic encapsulant.
It is an advantage of the present invention that stresses are balanced and bending is avoided while the package experiences a large change in temperature.
These and other objects, features, and advantages of the invention are accomplished by a chip package comprising a semiconductor chip having contact pads and a lead frame having lead fingers spaced at least a first distance from the contact pads and located on a first level adjacent the contact pads. An encapsulant encapsulates the chip and a portion of the lead frame. A material located on a second level is also within the encapsulant. The material has an area comprising a length and a width on this second level. The material also has a thickness, the length and width being greater than the thickness. The material extends a second distance from the chip, wherein said second distance is greater than the first distance. The material on the second level is for providing a more planar package by balancing thermal stress between the lead frame and the encapsulant.
The present inventors recognized that the warpage problem is usually greater when the, chip has an area substantially smaller than the package. Thus, as generations of chips are produced that are smaller in size while the package remains the same size, the warpage problem has increased. The present invention provides a way to provide smaller chips within the package without increasing warpage. In a preferred embodiment of the invention the material is an integral portion of the lead frame. It is a bent portion of the lead frame, within the encapsulant on a different level than the portion that is electrically connected to the chips. The material may comprise a portion of the lead frame that is not electrically connected to a lead when packaging is complete. In another embodiment, the material is a body, such as a second semiconductor chip, that is not electrically connected to the bond pads of the chip with wires. The second semiconductor chip can be mounted to a tape for holding it in position during assembly.